BEng Electrical and Electronic Engineering with Industrial Experience

This unit will cover the following:

• Digital system design process. EDA tools and design viewpoints. Behavioural, dataflow, and gate-level descriptions.
• Hardware description languages. VHDL modelling concepts. Behavioural and structural architecture descriptions. Concurrent and sequential statements. Event-driven simulation.
• Building blocks for digital systems: tri-state buffers, multiplexers, latches, flip-flops, registers, counters, arithmetic circuits, finite state machines.
• Design methodology. Synchronous systems. Top down design. Register-transfer-level design. Test benches. Synthesis from VHDL.
• Implementation issues: gate delays, timing, critical path, communication between unsynchronised machines, coping with metastability.
• Introduction to Programmable Logic Devices (FPGAs, CPLDs)

This course unit aims to: Enable students to use structured digital system design methods, hardware description languages and verification tools to design digital systems. Expose students to practical implementation issues for digital systems.

On the successful completion of the course, students will be able to:

ILO 1 - Predict behavior of a component specified using a Hardware Description Language (VHDL). [Developed] [Assessed]

ILO 2 - Produce VHDL descriptions of digital data-path components, finite state machines and algorithmic state machines. [Developed] [Assessed]

ILO 3 - Design and implement simple synchronous digital systems using FPGA hardware. [Developed] [Assessed]

ILO 4 - Estimate timing performance limits of a given digital circuit. [Developed] [Assessed]

Coursework:

Course work forms 20% of the unit assessment and is both formative and summative. Completion of all coursework is mandatory.

.