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BEng Electronic Engineering with Industrial Experience

Year of entry: 2024

Course unit details:
VLSI Design

Course unit fact file
Unit code EEEN20272
Credit rating 10
Unit level Level 2
Teaching period(s) Semester 2
Available as a free choice unit? No

Overview

Brief description of the unit:

Static CMOS gates: MOSFET devices, inverter, DC and transient characteristics, logic gates (NAND, NOR, complex gates), transistor sizing.

Performance and Power issues: gate delay, delay models, speed optimisation, power dissipation, static and dynamic power, low-power design techniques,

Wires and Variability: interconnect, impact of wiring parasitic, variability, technology trends.

Physical Design and Verification: EDA tools, layout design, design rules check (DRC), layout versus schematic (LVS), parasitics extraction, simulation, device models and process corners, corner analysis, Monte Carlo methods.

CMOS design: Transmission gates, multiplexers, latches and flip-flops, dynamic logic.

Memory circuits: static RAM, dynamic RAM.

Pre/co-requisites

Unit title Unit code Requirement type Description
Digital System Design I EEEN10131 Pre-Requisite Compulsory
Digital Systems Design II EEEN20121 Pre-Requisite Compulsory
Electronic Circuit Design II EEEN20222 Co-Requisite Compulsory
Microelectronic Components EEEN20232 Co-Requisite Compulsory

Aims

The course unit aims to: To introduce students to the design of Very Large Scale Integration (VLSI) microelectronic circuits, focussing on back-end integrated circuit design (custom transistor-level layout as well as design flow based on standard cells) using Electronic Design Automation (EDA) tools.

Learning outcomes

ILO 1 - Describe the structure and operating characteristics of basic CMOS cells (logic gates, latches) and design styles (static CMOS, dynamic CMOS). [Developed] [Assessed]
ILO 2 - Design digital circuits at the transistor-level and develop the corresponding layout for an IC fabrication process. [Developed] [Assessed]
ILO 3 - Use industry-standard IC design (EDA) tools to execute the design of a CMOS cell, including transistor-level circuit design, simulation, layout and design verification. [Developed] [Assessed]
ILO 4 - Outline the principle of operation of circuits used in memory systems. [Developed] [Assessed]
ILO 5 - Select appropriate digital circuit implementations to meet specified system requirements. [Developed] [Assessed]
ILO 6 - Explain the performance limitations of CMOS circuits, variability and future technology trends. [Developed] [Assessed]
ILO 7 - Produce technical reports relating to coursework and practical assignments. [Developed] [Assessed]

Teaching and learning methods

Teaching and learning processes include twenty hours of lectures, four hours of tutorials and four three-hour laboratory sessions (here, students use industry-standard IC design tool in a computer cluster). Additional support provided using assignment help sessions and an online discussion forum.

64 hours of private study expected.

Assessment methods

Method Weight
Other 40%
Written exam 60%

Written Examination

60% of the total mark

Coursework

40% of the total mark. The coursework mark consists of 3 laboratory reports and 1 design assignment.

Feedback methods

.

Recommended reading

Integrated circuit design by Weste, Neil H. E. Pearson / Addison Wesley, 2011. ISBN: 9780321547743

Principles of CMOS VLSI design: a systems perspective by Weste, Neil H. E. Addison-Wesley Pub Co, 1993. ISBN: 0201533766

CMOS VLSI design: a circuits and systems perspective by Weste, Neil H. E. Pearson India, 2015. ISBN: 9789332542884

CMOS VLSI design: a circuits and systems perspective by Weste, Neil H. E. Pearson Addison Wesley, 2005. ISBN: 0321269772

Study hours

Scheduled activity hours
Lectures 20
Practical classes & workshops 12
Tutorials 4
Independent study hours
Independent study 64

Teaching staff

Staff member Role
Jayawan Hasanka Bandara Wijekoon Herath Mudiyanselage Unit coordinator

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