- UCAS course code
- UCAS institution code
BSc Computer Science with Industrial Experience
Year of entry: 2023
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Course unit details:
Fundamentals of Computer Engineering
|Unit level||Level 1|
|Teaching period(s)||Semester 1|
|Available as a free choice unit?||Yes|
In this course you will learn about the design of digital electronic systems from simple digital circuits to the design of a simple processor. The exercises undertaken in laboratories complement the material covered in lectures. Professional commercial software tools are used in laboratories to enter designs and simulate their behaviour.
The main aim of this course is to give students a basic understanding of the hardware which underpins computing systems.
Further aims include:
- Introduction to basic logic and logic gates
- Partitioning of simple systems into combinatorial and sequential blocks
- To introduce basic CAD tools to aid in the design of a basic computer system
- To provide an overview of hardware description languages with particular emphasis on Verilog
- Introducing logic level implementation of a simple processor
- Discussion of how computer systems interact with memory and I/O devices
- Convert between different number bases and perform the process of binary addition and subtraction.
- Manipulate Boolean expressions and illustrate their implementation using simple combinatorial circuits.
- Discuss the design of simple binary adders and highlight the imitations of the design.
- Explain the key features of the Verilog language and write behavioural models in Verilog of combinatorial and sequential logic circuit designs.
- Design, implement and verify circuit designs using CAD tools.
- Discuss the organisation and operation of a simple digital computer including the processor, memory and input/output.
- Discuss and implement the design of a simple processor.
- Discuss the execution of machine language programs on a simple processor design and produce working code.
- Introduction to logic
Digital signals, data representation, Boolean logic and functions, De Morgan’s theorem, logic gates, multiplexers, binary arithmetic, abstraction & hierarchy, clocks, sequential systems.
- Computer Aided Design (CAD)
Complexity and design – the need for CAD tools, testing & simulation,
- Hardware description languages - Verilog
Introduction to Verilog, Verilog assignments, the always block and sensitivity list, design of combinatorial and sequential circuits in Verilog.
- Register Transfer Level (RTL) Design
The synchronous paradigm, introduction to sequential systems, RTL view of design, the register, datapath and control,
- Finite State Machines (FSM)
Introduction to the FSM, state transition diagrams, state transition tables, implementation in Verilog.
- Processor Design
Overview of the three-box model: CPU, Memory, I/O, processor operation, instruction execution – fetch/decode/execute – and the sequencing of actions, program counter, instruction register, condition code register.
- The Manchester University 0 (MU0) Processor
Introduction to MU0 - instruction set and operation, arithmetic logic unit (ALU) design and critical path, design of the MU0 datapath and control.
Von Neumann and Harvard architecture, tri-state buffers and bidirectional buses, memory map, address decoding schemes – one dimensional and two-dimensional, address decoders. Memory hierarchy
- Input and output
The I/O interface, communication and I/O devices,
- More Verilog
Examples of circuit designs in Verilog
- Programming MU0
Programming MU0 and accessing peripherals
Teaching and learning methods
This unit will be delivered using a blended approach to learning. Self-study materials will be made available in the form of written notes, videos and self-assessment quizzes in Blackboard that allow you to check your understanding of the material provided. Each week there will be a live session which will focus on covering design examples and/or providing support and general feedback on laboratory exercises. These sessions will be, where possible, interactive.
Laboratory exercises are supported by weekly drop-in sessions (from week 2), where students can get help and support.
Students are expected to spend (approximately):
2 hours per week working on the online asynchronous material (22 hours in total).
5 hours per week on the laboratory exercises (45 hours in total).
1 hour per week synchronous lecture (11 hours in total).
- Analytical skills
- Problem solving
|Practical skills assessment||50%|
Feedback is provided via formative quizzes in Blackboard and via automated marking for laboratory work, with feedback on work being delivered by email.
COMP12111 reading list can be found on the Department of Computer Science website for current students.
|Scheduled activity hours|
|Assessment written exam||2|
|Independent study hours|
|Paul Nutter||Unit coordinator|
Course unit materials
Links to course unit teaching materials can be found on the School of Computer Science website for current students.