Master of Engineering (MEng)

MEng Electrical and Electronic Engineering with Industrial Experience

*This course is now closed for applications for 2025 entry.

  • Duration: 5 years
  • Year of entry: 2025
  • UCAS course code: H601 / Institution code: M20
  • Key features:
  • Industrial experience
  • Scholarships available
  • Accredited course

Full entry requirementsHow to apply

Course unit details:
Digital Electronics

Course unit fact file
Unit code EEEN11102
Credit rating 20
Unit level Level 1
Teaching period(s) Semester 2
Available as a free choice unit? No

Overview

This course unit aims to provide a foundation for understanding the design and implementation of digital electronic systems and the operation of computing hardware.  It covers material from fundamental concepts of binary numbers and logic gates, through the design of digital circuits, up to the implementation of more complex system such as a general-purpose microprocessor. This course unit also introduces students to modern digital design methodologies.

Part A – Digital Logic Fundamentals

Introduction to Number Systems: Binary Numbers, Binary Addition, Signed Arithmetic, Binary Coding, Hexadecimal notation, Other Number Systems.

Boolean Algebra: Basic Logic Functions, Complement, Combined Functions, Logical Dual, De Morgans Theorem, Boolean Theorems, Manipulating Logic Expressions.

Combinational Logic: The Truth Table, Logic Gates, Algebraic Analysis of Logic Networks, Canonical forms (Sum of Products, Product of Sums), Cost of Implementation.

Logic Optimisation: Logic Reduction, Algebraic methods, Multi-level logic optimisation, Optimisation targets: Speed vs Power & Area, Algorithms for Logic Optimisation, EDA tools.

Combinational Logic Circuits: Multiplexer, Multiplexer-based logic, Encoders, Decoders, Parity Checkers, Adders, Subtractors, Carry Lookahead, Multiplier structures.

Sequential Logic Circuits: Memory Elements: D-type Latches and Flip-Flops; Sequential Functions: Register, Shift Register, Ring Counter, Linear Feedback Shift Register (LFSR), Binary Counter.

Finite State Machines (FSMs): State diagrams, Synchronous and Asynchronous Machines, Architecture of FSMs, Mealy and Moore Machines.

Memory Arrays: Address and Data Bus, Address Decoder, Memory Architecture, Types of memory: SRAM, DRAM, Flash.

Part B – Digital System Implementation

EDA Tools for Hardware implementation: Electronic Systems Description, Introduction to Hardware Description Languages, Descriptions of combinatorial and sequential components.

Design and Implementation of FSMs: Logic Synthesis of FSMs, State Encoding, FSM Optimisations, FSM implementation using Programmable Logic Devices.

Programmable Logic Devices: Programmable Logic Arrays, Logic Blocks and Programmable Interconnect, Implementing logic using lookup-tables, Architectures: CPLD, FPGA.

Integrated Circuits: Switch-based logic circuits, Transistors, CMOS Circuits (inverter, NAND gate, NOR gate), Open-drain and tri-state gates, Flip-Flops; Speed, Power, Area.

Part C – Introduction to Computer Architecture

General-purpose computing: Turing Machine, Stored-program computer, CPU and Memory. Instruction Set. Microarchitecture. Von Neumann and Harvard architectures.

CPU Microarchitecture: Program counter. Instruction decoder, Register File, Arithmetic Logic Unit (ALU), Multiplexers, Datapath bit width. Program memory and Data memory.

Instruction Set: Machine Code, Fetch-Decode-Execute Cycle. Register and memory transfers. Arithmetic and logic instructions. Jumps. Conditional branches, ALU flags (Carry, Zero), Calls, Instruction encoding, Assembly language, Compilers.

Introduction to Modern CPUs: ARM and RISC-V, Pipeline, Caches, Parallelism. System on a Chip. Multicore. Accelerators and GPUs. Floating point numbers. Performance vs power. Microcontrollers.
 

Aims

This units aims to:

- provide a foundation in digital electronic systems design, covering number systems, Boolean algebra, logic gates, and design of both combinational and sequential logic;

- introduce logic optimisation techniques and the use of Electronic Design Automation (EDA) tools for the design and implementation of digital circuits, including memory arrays and finite state machines (FSMs);

- familiarise students with programmable logic devices (PLDs), such as CPLDs and FPGAs, and their applications in digital system implementation;

- introduce the key concepts of computer architecture.

Learning outcomes

On the successful completion of the course, students will be able to:

ILO 1: Manipulate logic expressions using Boolean algebra. (Developed and Assessed)

ILO 2: Describe the operation of basic digital circuit components: logic gates, latches and flip-flops, multiplexers. (Developed and Assessed)

ILO 3: Implement logic functions, binary arithmetic circuits and sequential components such as counters, shift registers, and finite state machines using basic digital circuit components. (Developed and Assessed)

ILO 4: Express the functionality of combinatorial and sequential components and finite state machines using truth tables, state diagrams, timing diagrams and hardware description languages. (Developed and Assessed)

ILO5: Describe the importance of logic circuit optimisation and the practice of using EDA tools for this purpose. (Developed and Assessed)

ILO 6: Evaluate trade-offs between implementation cost, speed and power of various circuit configurations. (Developed and Assessed)

ILO7: Explain the design of digital memories, and the difference between, static and dynamic, volatile and non-volatile memory. (Developed and Assessed)

ILO8: Outline the pathways to digital circuit implementation such as programmable logic devices and CMOS integrated circuits. (Developed and Assessed)

ILO 9: Summarise the key components of a CPU and explain how they are built with logic circuits. (Developed and Assessed)

ILO 10: Describe how the CPU components interact to execute machine code. (Developed and Assessed)

ILO 11: Explain microprocessor Instruction Set Architecture and the Microarchitecture. (Developed and Assessed)

ILO 12: Implement logic circuits using programmable logic devices and Electronic Design Automation tools. (Developed and Assessed)

Teaching and learning methods

Large group lectures are held weekly during two two-hour sessions. Presentation slides and lecture notes are made available electronically via SLATE.

Additional e-learning videos are provided to support the understanding of key concepts and to offer additional worked examples.

Laboratory sessions are conducted in a computer cluster and dry teaching lab, with the support of Teaching Assistants, to reinforce the key concepts covered in the course unit.

Weekly small-group tutorials, led by Teaching Assistants, focus on technical discussions related to specific concepts covered in the lectures. 

Assessment methods

Method Weight
Other 10%
Written exam 75%
Report 15%

Written Exam: 3 hours
Lab-based coursework: 15 hours
Weekly Tutorial Questions: 5 hours

Feedback methods

Written Exam: Standard exam feedback provided after the exam board.

Lab-based coursework: Feedback provided via SLATE system within three weeks after the submission deadline.

Weekly Tutorial Questions: Feedback provided via SLATE system within one week after the submission deadline.

Recommended reading

Mano, M.M. and Kime, C.R. (2015). Logic and Computer Design Fundamentals. 5th edn. Pearson. ISBN: 9780133760637.

Holdsworth, B. and Woods, C. (2002). Digital Logic Design. 4th edn. Newnes. ISBN: 9780750645829.

Katz, R.H. (1994). Contemporary Logic Design. Benjamin Cummings. ISBN: 9780805327038.

Green, D.H. (1986). Modern Logic Design. Addison Wesley. ISBN: 9780201145410.
 

Study hours

Scheduled activity hours
Lectures 44
Practical classes & workshops 15
Tutorials 5
Independent study hours
Independent study 136

Teaching staff

Staff member Role
Zhipeng Wu Unit coordinator
Piotr Dudek Unit coordinator
Frank Podd Unit coordinator

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