- UCAS course code
- HHH6
- UCAS institution code
- M20
Master of Engineering (MEng)
MEng Mechatronic Engineering
*This course is now closed for applications for 2025 entry.
Duration: 4 years
Year of entry: 2025
UCAS course code: HHH6 / Institution code: M20
- Key features:
Scholarships available
Accredited course
- Typical A-level offer: AAA including specific subjects
- Typical contextual A-level offer: AAB including specific subjects
- Refugee/care-experienced offer: ABB including specific subjects
- Typical International Baccalaureate offer: 36 points overall with 6,6,6 at HL, including specific requirements
Fees and funding
Fees
Tuition fees for home students commencing their studies in September 2025 will be £9,535 per annum (subject to Parliamentary approval). Tuition fees for international students will be £34,000 per annum. For general information please see the undergraduate finance pages.
Policy on additional costs
All students should normally be able to complete their programme of study without incurring additional study costs over and above the tuition fee for that programme. Any unavoidable additional compulsory costs totalling more than 1% of the annual home undergraduate fee per annum, regardless of whether the programme in question is undergraduate or postgraduate taught, will be made clear to you at the point of application. Further information can be found in the University's Policy on additional costs incurred by students on undergraduate and postgraduate taught programmes (PDF document, 91KB).
Scholarships/sponsorships
For information about scholarships and bursaries please visit our undergraduate student finance pages and our Department funding pages .
Course unit details:
Computer Systems Architecture
| Unit code | EEEN30222 |
|---|---|
| Credit rating | 10 |
| Unit level | Level 3 |
| Teaching period(s) | Semester 2 |
| Available as a free choice unit? | No |
Overview
The unit is structured around the eight principal topics listed below.
- Fundamentals of computer architecture
- Processor instruction formats
- Quantitative performance analysis
- Memory hierarchy
- CISC and RISC architectures
- Arithmetic and data representation
- Instruction pipelining
- Multiprocessor architectures
Pre/co-requisites
| Unit title | Unit code | Requirement type | Description |
|---|---|---|---|
| Microcontroller Engineering I | EEEN10202 | Pre-Requisite | Compulsory |
| Digital System Design I | EEEN10131 | Pre-Requisite | Compulsory |
| Microcontroller Engineering II | EEEN20011 | Pre-Requisite | Compulsory |
| Digital Systems Design II | EEEN20121 | Pre-Requisite | Compulsory |
| C Programming | EEEN10242 | Pre-Requisite | Compulsory |
Aims
The unit aims to:
Analysing and optimising the performance of software applications often requires a detailed knowledge of the hardware architecture and low-level programming of computer systems, as well as the relevant analysis and synthesis skills. This unit provides students with these skills and knowledge.
Learning outcomes
On successful completion of the course, a student will be able to:
ILO 1: Analyse the operation of hardware architectural components when executing programs.
ILO 2: Describe in detail the operation of hardware architectural components and interpret specification information.
ILO 3: Create software to simulate the operation of hardware architectural components and derive performance metrics.
ILO 4: Apply standard design techniques to specify or parameterise hardware architectural components.
ILO 5: Evaluate the performance of assembly language instruction sequences and synthesise optimised versions.
Teaching and learning methods
The unit is delivered through: 18 lectures, 6 Examples Classes and 2 Laboratory Classes. The Laboratory Classes are designed to reinforce key concepts from the lecture material.
Assessment methods
| Method | Weight |
|---|---|
| Other | 20% |
| Written exam | 80% |
Coursework:
2 laboratories both assessed in lab and 1 report to be submitted via Blackboard.
Coursework forms 20% of the unit assessment
Feedback methods
.
Recommended reading
J.L. Hennessy and D.A. Patterson, “Computer Organization and Design: The Hardware/Software Interface”, ARM Edition, Morgan Kaufmann, 2016.
J.L. Hennessy and D.A. Patterson, “Computer Architecture: A Quantitative Approach”, Sixth Edition, Morgan Kaufmann, 2017.
N. Nisan and S. Schocken, “The elements of computing systems : building a modern computer from first principles”, MIT Press, 2008.
S. William, "Computer Organization and Architecture : Designing for Performance", Eighth Edition, Boston, [Mass.] ; Pearson, 2010.
Study hours
| Scheduled activity hours | |
|---|---|
| Lectures | 18 |
| Practical classes & workshops | 6 |
| Tutorials | 6 |
| Independent study hours | |
|---|---|
| Independent study | 70 |
Teaching staff
| Staff member | Role |
|---|---|
| Peter Green | Unit coordinator |